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74ABT162244
16-bit buffer/line driver with 30 series termination resistors; 3-state
Rev. 05 -- 25 May 2010 Product data sheet
1. General description
The 74ABT162244 high-performance Bipolar CMOS (BiCMOS) device combines low static and dynamic power dissipation with high speed and high output drive. The 74ABT162244 is a 16-bit buffer that is ideal for driving bus lines. The device features four output enable inputs (1OE, 2OE, 3OE, 4OE), each controlling four of the 3-state outputs. The 74ABT162244 is designed with 30 series resistance in both the upper and lower output structures. This design reduces line noise in applications such as memory address drivers, clock drivers and bus receivers/transmitters.
2. Features and benefits
16-bit bus interface Multiple VCC and GND pins minimize switching noise Power-up 3-state 3-state buffers Output capability: +12 mA and -32 mA Live insertion and extraction permitted Latch-up performance: JESD 78 Class II ESD protection: HBM JESD-A114E exceeds 2000 V CDM JESD 22-C101-C exceeds 1000 V
3. Ordering information
Table 1. Ordering information Package Temperature range 74ABT162244DGG 74ABT162244DL -40 C to +85 C -40 C to +85 C Name TSSOP48 SSOP48 Description plastic thin shrink small outline package; 48 leads; body width 6.1 mm Version SOT362-1 Type number
plastic shrink small outline package; 48 leads; body SOT370-1 width 7.5 mm
NXP Semiconductors
74ABT162244
16-bit buffer/line driver with 30 series termination resistors; 3-state
4. Functional diagram
47 1A0 46 1A1 44 5 1Y2 43 1 6 1Y3 3A3 3OE 3A2 3 1Y1 3A1 33 16 3Y2 2 1Y0 3A0 35 14 3Y1 36 13 3Y0
1 1OE 48 2OE 25 3OE 24 4OE 1A0 47 46 44 43 41 40 38 37 36 35 33 32 30 29 27 26
EN1 EN2 EN3 EN4 1 1 2 3 5 6 1 2 8 9 11 12 1 3 13 14 16 17 1 4 19 20 22 23 1Y0 1Y1 1Y2 1Y3 2Y0 2Y1 2Y2 2Y3 3Y0 3Y1 3Y2 3Y3 4Y0 4Y1 4Y2 4Y3
1A2
1A3 1OE
32 25
17 3Y3
1A1 1A2 1A3 2A0 2A1 2A2
41 2A0 40 2A1 38
8 2Y0 9 2Y1 11 2Y2 4A2 4A1 4A0
30
19 4Y0
2A3 3A0 3A1
29
20 4Y1
3A2 3A3 4A0 4A1 4A2
2A2
27
22 4Y2
2A3 2OE
37 48
12 2Y3 4A3 4OE
26 24
23 4Y3
4A3
001aae231 mna996
Fig 1.
Logic symbol
Fig 2.
IEC logic symbol
VCC
output
GND
001aac384
Fig 3.
Logic diagram one output
74ABT162244
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(c) NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 05 -- 25 May 2010
2 of 15
NXP Semiconductors
74ABT162244
16-bit buffer/line driver with 30 series termination resistors; 3-state
5. Pinning information
5.1 Pinning
1OE 1Y0 1Y1 GND 1Y2 1Y3 VCC 2Y0 2Y1
1 2 3 4 5 6 7 8 9
48 2OE 47 1A0 46 1A1 45 GND 44 1A2 43 1A3 42 VCC 41 2A0 40 2A1 39 GND 38 2A2 37 2A3 36 3A0 35 3A1 34 GND 33 3A2 32 3A3 31 VCC 30 4A0 29 4A1 28 GND 27 4A2 26 4A3 25 3OE
001aaj890
GND 10 2Y2 11 2Y3 12 3Y0 13 3Y1 14 GND 15 3Y2 16 3Y3 17 VCC 18 4Y0 19 4Y1 20 GND 21 4Y2 22 4Y3 23 4OE 24
74ABT162244
Fig 4.
Pin configuration
5.2 Pin description
Table 2. Symbol 1OE 1Y[0:3] GND VCC 2Y[0:3] GND 3Y[0:3] GND VCC 4Y[0:3] GND 4OE
74ABT162244
Pin description Pin 1 2, 3, 5, 6 4 7 8, 9, 11, 12 10 15 18 21 24 Description 1 output enable (LOW active) 1 data output 0 to output 3 ground (0 V) supply voltage 2 data output 0 to output 3 ground (0 V) ground (0 V) supply voltage ground (0 V) 4 output enable (LOW active)
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13, 14, 16, 17 3 data output 0 to output 3
19, 20, 22, 23 4 data output 0 to output 3
Product data sheet
Rev. 05 -- 25 May 2010
3 of 15
NXP Semiconductors
74ABT162244
16-bit buffer/line driver with 30 series termination resistors; 3-state
Table 2. Symbol 3OE GND 4A[0:3] VCC GND 3A[0:3] GND 2A[0:3] VCC GND 1A[0:3] 2OE
Pin description ...continued Pin 25 28 31 34 39 42 45 48 Description 3 output enable (LOW active) ground (0 V) supply voltage ground (0 V) ground (0 V) supply voltage ground (0 V) 2 output enable (LOW active)
30, 29, 27, 26 4 data input 0 to input 3
36, 35, 33, 32 3 data input 0 to input 3 41, 40, 38, 37 2 data input 0 to input 3
47, 46, 44, 43 1 data input 0 to input 3
74ABT162244
All information provided in this document is subject to legal disclaimers.
(c) NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 05 -- 25 May 2010
4 of 15
NXP Semiconductors
74ABT162244
16-bit buffer/line driver with 30 series termination resistors; 3-state
6. Functional description
Table 3. Control nOE L L H
[1]
Function table[1] Input nAn L H X Output nYn L H Z
H = HIGH voltage level; L = LOW voltage level; X = don t care; Z = high-impedance OFF-state.
7. Limiting values
Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol VCC VI VO IIK IOK IO Tj Tstg
[1] [2]
Parameter supply voltage input voltage output voltage input clamping current output clamping current output current junction temperature storage temperature
Conditions
[1]
Min -0.5 -1.2 -0.5 -18 -50 [2]
Max +7.0 +7.0 +5.5 128 -64 150 +150
Unit V V V mA mA mA mA C C
output in OFF-state or HIGH-state VI < 0 V VO < 0 V output in LOW-state output in HIGH-state
[1]
-65
The input and output voltage ratings may be exceeded if the input and output current ratings are observed. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction temperatures which are detrimental to reliability.
8. Recommended operating conditions
Table 5. Operating conditions Voltages are referenced to GND (ground = 0 V). Symbol VCC VI VIH VIL IOH IOL t/V Tamb Parameter supply voltage input voltage HIGH-level input voltage LOW-level Input voltage HIGH-level output current LOW-level output current input transition rise and fall rate ambient temperature in free air Conditions Min 4.5 0 2.0 -32 -40 Typ Max 5.5 VCC 0.8 12 10 +85 Unit V V V V mA mA ns/V C
74ABT162244
All information provided in this document is subject to legal disclaimers.
(c) NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 05 -- 25 May 2010
5 of 15
NXP Semiconductors
74ABT162244
16-bit buffer/line driver with 30 series termination resistors; 3-state
9. Static characteristics
Table 6. Symbol VIK VOH Static characteristics Parameter Conditions Min input clamping voltage VCC = 4.5 V; IIK = -18 mA HIGH-level output voltage VI = VIL or VIH VCC = 4.5 V; IOH = -3 mA VCC = 5.0 V; IOH = -3 mA VCC = 4.5 V; IOH = -32 mA VOL LOW-level output voltage VI = VIL or VIH VCC = 4.5 V; IOL = 8 mA VCC = 4.5 V; IOL = 12 mA II IOFF IO(pu/pd) IOZ input leakage current power-off leakage current VCC = 5.5 V; VI = VCC or GND VCC = 0 V; VI or VO 4.5 V
[1]
25 C Typ -0.9 2.9 3.4 2.4 5.0 5.0 Max -1.2 0.65 0.80 100 50 2.5 3.0 2.0 -
-40 C to +85 C Unit Min 2.5 3.0 2.0 Max -1.2 0.65 0.80 1.0 100 50 V V V V V V A A A
0.01 1.0
power-up/power-down VCC = 2.0 V; VO = 0.5 V; output current VI = GND or VCC; nOE = HIGH OFF-state output current VCC = 5.5 V; VI = VIL or VIH output HIGH-state at VO = 5.5 V output LOW-state at VO = 0 V
[2]
0.1 -0.1 5.0
10 -10 50
-50 -
10 -10 50 -180 1.0 19 1.0 250
A A A mA mA mA mA A
ILO IO ICC
output leakage current HIGH-state; VO = 5.5 V; VCC = 5.5 V; VI = GND or VCC output current supply current VCC = 5.5 V; VO = 2.5 V VCC = 5.5 V; VI = GND or VCC outputs HIGH-state outputs LOW-state outputs 3-state
-50 -
-100 -180 0.50 10 0.50 100 1.0 19 1.0 250
ICC
additional supply current input capacitance input/output capacitance
per input pin; VCC = 5.5 V; one input at 3.4 V and other inputs at VCC or GND VI = 0 V or VCC outputs disabled; VO = 0 V or VCC
[3][4]
-
CI CI/O
-
3 7
-
-
-
pF pF
[1] [2] [3] [4]
This parameter is valid for any VCC between 0 V and 2.1 V, with a transition time of up to 10 ms. From VCC = 2.1 V to VCC = 5 V 10 %, a transition time of up to 100 s is permitted. Not more than one output should be tested at a time, and the duration of the test should not exceed one second. This is the increase in supply current for each input at 3.4 V. This data sheet limit may vary among suppliers.
74ABT162244
All information provided in this document is subject to legal disclaimers.
(c) NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 05 -- 25 May 2010
6 of 15
NXP Semiconductors
74ABT162244
16-bit buffer/line driver with 30 series termination resistors; 3-state
10. Dynamic characteristics
Table 7. Dynamic characteristics GND = 0 V. For test circuit, see Figure 7. Symbol Parameter Conditions 25 C; VCC = 5.0 V Min tPLH tPHL tPZH tPZL tPHZ tPLZ LOW to HIGH propagation delay HIGH to LOW propagation delay OFF-state to HIGH propagation delay OFF-state to LOW propagation delay HIGH to OFF-state propagation delay LOW to OFF-state propagation delay nAn to nYn, see Figure 5 nAn to nYn, see Figure 5 nOE to nYn; see Figure 6 nOE to nYn; see Figure 6 nOE to nYn; see Figure 6 nOE to nYn; see Figure 6 1.0 1.6 1.2 2.6 1.5 1.3 Typ 1.8 3.2 2.7 5.0 3.0 2.6 Max 2.4 4.0 3.5 6.2 3.8 3.3 -40 C to +85 C; Unit VCC = 5.0 V 0.5 V Min 1.0 1.6 1.2 2.6 1.5 1.3 Max 2.7 4.4 4.3 7.3 4.5 4.6 ns ns ns ns ns
74ABT162244
All information provided in this document is subject to legal disclaimers.
(c) NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 05 -- 25 May 2010
7 of 15
NXP Semiconductors
74ABT162244
16-bit buffer/line driver with 30 series termination resistors; 3-state
11. Waveforms
VI input nAn 0V tPHL VOH output nYn VOL
001aaj028
VM
VM
tPLH
VM
VM
VM = 1.5 V VOL and VOH are typical voltage output levels that occur with the output load.
Fig 5.
Input (nAn) to output (nYn) propagation delay
VI nOE input GND tPZL 3.5 V nYn output VOL tPZH VOH nYn output 0V
001aaj892
VM
tPLZ
VM
VOL + 0.3 V tPHZ VOH - 0.3 V
VM
VM = 1.5 V VOL and VOH are typical voltage output levels that occur with the output load.
Fig 6.
3-state output enable and disable times
74ABT162244
All information provided in this document is subject to legal disclaimers.
(c) NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 05 -- 25 May 2010
8 of 15
NXP Semiconductors
74ABT162244
16-bit buffer/line driver with 30 series termination resistors; 3-state
12. Test information
tW 90 % VM 10 % tf tr VI positive pulse 0V 10 % tW
001aai298
VI negative pulse 0V
90 % VM 10 % tr tf 90 % VM 90 % VM 10 %
VM = 1.5 V
a. Input pulse definition
VEXT VCC VI DUT
RT CL RL RL
PULSE GENERATOR
VO
001aac764
Test data is given in Table 8. Definitions test circuit: RL = Load resistance. CL = Load capacitance including jig and probe capacitance. RT = Termination resistance should be equal to output impedance Zo of the pulse generator.
b. Test circuit for 3-state outputs Fig 7. Table 8. Input VI 3.0 V fi 1 MHz tW 500 ns tr, tf 2.5 ns Load circuitry for switching times Test data Load CL 50 pF RL 500 VEXT tPHZ, tPZH open tPLZ, tPZL 7.0 V tPLH, tPHL open
74ABT162244
All information provided in this document is subject to legal disclaimers.
(c) NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 05 -- 25 May 2010
9 of 15
NXP Semiconductors
74ABT162244
16-bit buffer/line driver with 30 series termination resistors; 3-state
13. Package outline
TSSOP48: plastic thin shrink small outline package; 48 leads; body width 6.1 mm SOT362-1
D
E
A X
c y HE vMA
Z
48
25
Q A2 A1 pin 1 index Lp L (A 3) A
1
e bp
24
wM
detail X
0
2.5 scale
5 mm
DIMENSIONS (mm are the original dimensions). UNIT mm A max. 1.2 A1 0.15 0.05 A2 1.05 0.85 A3 0.25 bp 0.28 0.17 c 0.2 0.1 D (1) 12.6 12.4 E (2) 6.2 6.0 e 0.5 HE 8.3 7.9 L 1 Lp 0.8 0.4 Q 0.50 0.35 v 0.25 w 0.08 y 0.1 Z 0.8 0.4 8 o 0
o
Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT362-1 REFERENCES IEC JEDEC MO-153 JEITA EUROPEAN PROJECTION
ISSUE DATE 99-12-27 03-02-19
Fig 8.
74ABT162244
Package outline SOT362-1 (TSSOP48)
All information provided in this document is subject to legal disclaimers. (c) NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 05 -- 25 May 2010
10 of 15
NXP Semiconductors
74ABT162244
16-bit buffer/line driver with 30 series termination resistors; 3-state
SSOP48: plastic shrink small outline package; 48 leads; body width 7.5 mm
SOT370-1
D
E
A
X
c y HE vM A
Z
48 25
Q A2 A1 (A 3) Lp
1 24
A
pin 1 index L wM detail X
e
bp
0
5 scale
10 mm
DIMENSIONS (mm are the original dimensions) UNIT mm Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT370-1 REFERENCES IEC JEDEC MO-118 JEITA EUROPEAN PROJECTION A max. 2.8 A1 0.4 0.2 A2 2.35 2.20 A3 0.25 bp 0.3 0.2 c 0.22 0.13 D (1) 16.00 15.75 E (1) 7.6 7.4 e 0.635 HE 10.4 10.1 L 1.4 Lp 1.0 0.6 Q 1.2 1.0 v 0.25 w 0.18 y 0.1 Z (1) 0.85 0.40 8 o 0
o
ISSUE DATE 99-12-27 03-02-19
Fig 9.
74ABT162244
Package outline SOT370-1 (SSOP48)
All information provided in this document is subject to legal disclaimers. (c) NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 05 -- 25 May 2010
11 of 15
NXP Semiconductors
74ABT162244
16-bit buffer/line driver with 30 series termination resistors; 3-state
14. Abbreviations
Table 9. Acronym CDM ESD HBM Abbreviations Description Charged Device Model ElectroStatic Discharge Human Body Model
15. Revision history
Table 10. Revision history Release date 20100525 Data sheet status Product data sheet Product data sheet Change notice Supersedes 74ABT162244_4 74ABT_H162244_3 Document ID 74ABT162244 v5 Modifications: 74ABT162244_4 Modifications:
* * * *
Table 6, Table note 1 transition time added. The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors. Legal texts have been adapted to the new company name where appropriate. 74ABTH162244 removed Product specification Product specification Product specification 74ABT_H162244_2 74ABT_H162244_1 -
20090409
74ABT_H162244_3 74ABT_H162244_2 74ABT_H162244_1
19981022 19980225 19961023
74ABT162244
All information provided in this document is subject to legal disclaimers.
(c) NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 05 -- 25 May 2010
12 of 15
NXP Semiconductors
74ABT162244
16-bit buffer/line driver with 30 series termination resistors; 3-state
16. Legal information
16.1 Data sheet status
Document status[1][2] Objective [short] data sheet Preliminary [short] data sheet Product [short] data sheet
[1] [2] [3]
Product status[3] Development Qualification Production
Definition This document contains data from the objective specification for product development. This document contains data from the preliminary specification. This document contains the product specification.
Please consult the most recently issued document before initiating or completing a design. The term `short data sheet' is explained in section "Definitions". The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com.
16.2 Definitions
Draft -- The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet -- A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. Product specification -- The information and data provided in a Product data sheet shall define the specification of the product as agreed between NXP Semiconductors and its customer, unless NXP Semiconductors and customer have explicitly agreed otherwise in writing. In no event however, shall an agreement be valid in which the NXP Semiconductors product is deemed to offer functions and qualities beyond those described in the Product data sheet.
suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer's own risk. Applications -- Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using NXP Semiconductors products, and NXP Semiconductors accepts no liability for any assistance with applications or customer product design. It is customer's sole responsibility to determine whether the NXP Semiconductors product is suitable and fit for the customer's applications and products planned, as well as for the planned application and use of customer's third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer's applications or products, or the application or use by customer's third party customer(s). Customer is responsible for doing all necessary testing for the customer's applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer's third party customer(s). NXP does not accept any liability in this respect. Limiting values -- Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale -- NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer's general terms and conditions with regard to the purchase of NXP Semiconductors products by customer. No offer to sell or license -- Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights.
16.3 Disclaimers
Limited warranty and liability -- Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. Notwithstanding any damages that customer might incur for any reason whatsoever, NXP Semiconductors' aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of NXP Semiconductors. Right to make changes -- NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use in automotive applications -- This NXP Semiconductors product has been qualified for use in automotive applications. The product is not designed, authorized or warranted to be
74ABT162244
All information provided in this document is subject to legal disclaimers.
(c) NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 05 -- 25 May 2010
13 of 15
NXP Semiconductors
74ABT162244
16-bit buffer/line driver with 30 series termination resistors; 3-state
Export control -- This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from national authorities.
16.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners.
17. Contact information
For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com
74ABT162244
All information provided in this document is subject to legal disclaimers.
(c) NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 05 -- 25 May 2010
14 of 15
NXP Semiconductors
74ABT162244
16-bit buffer/line driver with 30 series termination resistors; 3-state
18. Contents
1 2 3 4 5 5.1 5.2 6 7 8 9 10 11 12 13 14 15 16 16.1 16.2 16.3 16.4 17 18 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 1 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 Functional description . . . . . . . . . . . . . . . . . . . 5 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 5 Recommended operating conditions. . . . . . . . 5 Static characteristics. . . . . . . . . . . . . . . . . . . . . 6 Dynamic characteristics . . . . . . . . . . . . . . . . . . 7 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Test information . . . . . . . . . . . . . . . . . . . . . . . . . 9 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 10 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 12 Legal information. . . . . . . . . . . . . . . . . . . . . . . 13 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 13 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Contact information. . . . . . . . . . . . . . . . . . . . . 14 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Please be aware that important notices concerning this document and the product(s) described herein, have been included in section `Legal information'.
(c) NXP B.V. 2010.
All rights reserved.
For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 25 May 2010 Document identifier: 74ABT162244

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